AUTHENTICATION WITH AES CRYPTOGRAPHIC ENCRYPTION CHIP DESIGN AND SIMULATION

Abstract

Authentication is an indispensable part of Cryptography, which is an unconditionally secure key distribution technique based on the laws of nature. The paper explains the encryption technique using AES algorithm with 128 bits block size and 128 bit key size. The design is developed using S box technique with optimal hardware solution with the help of VHDL programming language.  The design is synthesized on Vertex-5 FPGA using Xilinx 14.2 software and Modelsim 10.1 b. The algorithm is implemented to work in software and the file is to be encrypted in software and transferred to the machine containing the FPGA, which guarantees the secured communication and authentication. The concept of secured communication can be authenticated ATM machines, smart devices, biometrics applications and password protected devices. Remote authentication schemes allow a valid user to login a remote server and to access the services provided by the remote server over an insecure channel. Password based authentication schemes are the most widely used techniques for remote user authentication. Password based remote user authentication schemes are used to check the validity of a login request made by a remote user.